Flip-flop test circuit

Abstract

PURPOSE: To make it possible to detect fault at a high speed regardless of the number of F/Fs by inputting the same data to all of a plurality of flip-flops F/Fs, and detecting whether all the data of the F/Fs are the same or not. CONSTITUTION: At first, when F/Fs are tested, a test signal 6 becomes a high level 'H.' A common-data input signal 7 is selected with each selector and inputted into a data input terminal DI of each F/F. A common hold signal 8 is selected with the selector and inputted into a hold input signal HD. At this time, since the signals 7 and 8 are inputted into each F/F, the same data are outputted in synchronization with the rise-up of a clock pulse 6 when all the F/Fs are operated normally. Therefore, the outputs AL and AH of a NOR circuit 4 and an AND circuit at this time become 'H' and 'L' or 'L' and 'H.' When any of the F/Fs 1 - 3 fails, the outputs AL and AH of the circuits 4 and 5 become 'L' and 'L.' Therefore, when the outputs AL and AH are observed, the fact that there is the fault in the F/Fs can be detected. COPYRIGHT: (C)1990,JPO&Japio

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